About me
I am a fourth-year Electrical and Electronics Engineering student at Ostim Technical University, continuing my studies as the top-ranking student in my department with a GPA of 3.84 / 4.00. I work on digital design, embedded systems, artificial intelligence, and chip architecture and design.
Alongside my degree I work at Anadologic as an embedded systems and digital design engineer, currently on SpaceWire design to the ECSS-E-ST-50-12C standard. Before that I built Embedded Linux based Edge AI applications on Zynq UltraScale+ SoC FPGA platforms — hardware-accelerated computer vision on the DPU, and GStreamer pipelines carrying high-resolution industrial camera streams for real-time defect detection on production lines.
With the Ostim BLogic Microelectronics team, of which I am the founding captain, we are designing our own MCU architecture for the TEKNOFEST Chip Design competition. We passed the ÖTR preliminary design report stage and are a 2026 finalist team. My own role there is RTL design and FPGA prototyping on a Genesys 2 (Kintex-7).
I am well suited to teamwork and always open to learning — which is really what the log on this site is for. I frequently hear from those around me that I am organised, responsible and disciplined, and my goal is to create lasting value in high-tech projects.
Skills
The tools I actually work in, not a wish list.
- Verilog
- VHDL
- SystemVerilog
- C
- C++
- C#
- Xilinx FPGA
- Gowin FPGA
- Intel FPGA
- Microchip FPGA
- Zynq SoC
- Arria SoC
- Vivado
- VS Code
- Visual Studio
- Altium
- LTspice
- NI Multisim
- Embedded Linux
- AutoCAD
- SolidWorks
Experience
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Sep 2025 — Present
Embedded Systems & Digital Design Candidate Engineer — Anadologic
Since July 2026, SpaceWire design compliant with the
ECSS-E-ST-50-12C standard.
Until then: Embedded Linux based Edge AI on Zynq UltraScale+ SoC FPGA platforms, integrating AI models into hardware. Designed hardware-accelerated computer vision architectures on the Deep Learning Processing Unit (DPU) for industrial automation, and built a system that carries high-resolution industrial camera streams through GStreamer pipelines for real-time defect detection and quality control on production lines. - Jan 2026 — Present Founder & Team Captain — Ostim BLogic Microelectronics Designing our own MCU for the TEKNOFEST Chip Design competition. Passed the ÖTR preliminary design report stage; 2026 finalist team. My role: RTL design and FPGA prototyping on a Genesys 2 (Kintex-7).
- Jun 2026 Digital Design Intern — TÜBİTAK BİLGEM Summer internship at TÜTEL, the Integrated Circuit Design and Training Laboratory. Completed every assigned task, from counter design up to processor design: FIFO, UART, Ethernet, Boron and a single-cycle CPU, all on the DE10-Standard development kit.
- Jun 2025 — Jul 2025 R&D Intern — PESS Power Electronic System Solution Designed filters, AC/DC and DC/DC converters and power electronics circuits in Altium Designer, checking circuit behaviour in LTspice and PSIM. Took an active part in the wiring, testing, software and documentation of manufactured products — in particular the test stages of active harmonic filters, regulators and rectifiers.
- Jan 2025 Embedded Software & Digital Design Intern — Anadologic Built C applications on microcontrollers (Raspberry RP2040) driving sensors and motors — gyro, stepper, servo — over UART, I2C, SPI and TinyUSB. Developed a project on Intel FPGA (Altera, Arria) families in Quartus Prime, wrote a UART module in VHDL on Vivado, and researched Intel oneAPI, working on image processing with DPC++.
- Jun 2024 — Aug 2024 R&D Intern — PESS Power Electronic System Solution Hardware–software integration for power electronics and industrial systems, working with Dr. Hüseyin Köse. Took an active role in the project reading, wiring and commissioning of uninterruptible power supplies and rectifiers; designed HMIs in Visual Studio and Nextion to control them, with system communication over RS485, RS232 and TCP/IP, and completed the field tests and technical documentation.
Education & languages
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Ostim Technical University
2022 — 2027B.Sc., Faculty of Engineering — Electrical and Electronics Engineering. GPA 3.84 / 4.00, ranked first in the department.
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English
C2+Completed the preparatory year at C2+ level, 78 / 100. Reading, writing, listening and speaking all at a working level.